Linus Torvalds writes: (Summary) The AIX documentation implies that the
*sequence* of load-compare-conditional branch-isync is a memory
barrier, even if isync on its own is now.
barrier, even if isync on its own is now.
So I'm just saying that
So I'm just saying that
(a) isync-on-lock is supposed to be much cheaper than sync-on-lock (a) isync-on-lock is supposed to be much cheaper than sync-on-lock (b) the AIX documentation at least implies that isync-on-lock (when used together the the whole locking sequence) is actually a memory barrier
barrier
Now, admittedly the powerpc barrier instructions are unfathomable crazy stuff, so who knows.
barrier, even if isync on its own is now.
So I'm just saying that
So I'm just saying that
(a) isync-on-lock is supposed to be much cheaper than sync-on-lock (a) isync-on-lock is supposed to be much cheaper than sync-on-lock (b) the AIX documentation at least implies that isync-on-lock (when used together the the whole locking sequence) is actually a memory barrier
barrier
Now, admittedly the powerpc barrier instructions are unfathomable crazy stuff, so who knows.