Linus Torvalds writes: (Summary)
The really nitty-gritty stuff is not architected, and generally not
documented outside (possibly) the BIOS writer's guide that is not made
public.
public.
Those magical registers contain details like how the DRAM is interleaved (if it is), what the timings are, where which memory controller handles which memory range, and what are goes to PCIe etc. That's the kind of steering I'm talking about - at a low level how physical addresses get mapped to different cache partitions, memory controllers, or to the IO system etc.
controllers, or to the IO system etc.
Linus
Linus
Linus
public.
Those magical registers contain details like how the DRAM is interleaved (if it is), what the timings are, where which memory controller handles which memory range, and what are goes to PCIe etc. That's the kind of steering I'm talking about - at a low level how physical addresses get mapped to different cache partitions, memory controllers, or to the IO system etc.
controllers, or to the IO system etc.
Linus
Linus
Linus
